XoC Complete SoC Co-Verification for ARM Processors

XoC Benefits Improved Performance: Fast, accurate models of ARM CPU cores Ability to run 10 to 1000 times faster than software logic simulators Complete Tool Integration: Co-Verification Memory Interfaces for reducing communication overhead Unified environment that verifies all nine operating modes of HW/SW co-verification No time requirement for integrating tools from multiple vendors Single point-of-contact for all customer support needs Flexible and Easy Debugging: Co-Verification Debugger to correlate hardware bus transactions with software instructions, facilitating communication between software and hardware teams Hardware Engineers Source-level Verilog and VHDL debugging VCD-on-Demand (VoD) for optimized hardware waveform generation HW/SW logic simulation hot swapping for hardware debugging flexibility Software Engineers Source-level debugging of ARM software Instant Replay for high performance software debugging

How to Verify Larger ARM SoCs?
As ARM system-on-a-chip (SoC) designs are growing in size from 1M up to 10M gates, traditional verification methods are proving to be inadequate for the larger SoC designs.

Traditional verification methods, such as waveform dumping, slow logic simulation models, and ad hoc testbench code, are inefficient and ineffective due to their limitations with respect to design size.

New verification methods have been limited to point tools from multiple vendors. Evaluating and integrating these point tools have been difficult and time consuming, and even when loosely integrated, these tools do not always work well together.

XoC, the Unified Verification Tool
To provide a comprehensive and leading-edge methodology for ARM SoC verification, Verisity is pleased to offer XoC™ for ARM Processors, a unified toolset for hardware and software engineers to verify and debug designs containing ARM microprocessors.

In one package, XoC provides mixed HDL logic simulation, simulation acceleration, in-circuit emulation (ICE), HW/SW co-verification, ICE using ARM core modules, and AMBA bus testbench development.

Additionally, all of these functions include Verisity's proven and reliable features: HW/SW logic simulation, hot swapping, VCD-on-Demand (VoD) for hardware debugging, source-level software debugging, Co-Verification Debugger, and Co-Verification Memory Interfaces.

Instant Replay for Hardware and Software Engineers
XoC provides a Transaction Instrument to capture bus transactions for later use by software and hardware engineers. Software engineers use the transactions to inspect software execution; graphical software debugger to correlate software instructions to bus transactions and simulation timestamps. Hardware engineers use the transactions to reproduce problems, to test fixes, and as regression tests.

HW/SW Logic Simulation Hot Swapping for Hardware Engineers
XoC allows hardware engineers to easily swap logic simulation state from software to hardware, in order to run at hardware acceleration speeds, yet debug in a flexible software environment.

VoD for Hardware Engineers
VCD-on-Demand (VoD) provides access to all history values of the hardware design from any point in simulation without re-simulating from time zero. Waveforms can be generated in either IEEE-standard VCD (Value-Change-Dump) or FSDB (Fast Signal Database) format.

Co-Verification Memory Interfaces for Software Engineers
XoC provides two memory interfaces for software engineers to increase performance and debugging accuracy: software memory models and simulation memory models.

Time-Saving Benefits
Using XoC saves time in every phase of your verification cycle. Your simulation runs will be significantly faster. Debugging will be more efficient and flexible as a result of Verisity’s superior debugging tools. Co-Verification Memory Interfaces will eliminate communication overhead.

Of course, you will not spend time integrating point tools. Also, when you have questions, you can get all of your answers in one place: Verisity's outstanding customer support.

Best Choice for SoC Verification
Verisity has a proven track record for producing dependable verification products. XoC enables a complete verification methodology for integration of all levels of ARM software with the hardware design before prototypes are available. XoC provides the most complete set of tools available today for hardware and software engineers designing ARM SoC products.

XoC for ARM Processors Specifications
Architecture	ReConfigurable Computing (RCC) engine Event-based algorithm
Supported Operating Systems and HW Platforms	Sun Solaris: Sun Ultra 60, 80 Sun Blade 1000, 2000 Red Hat Linux: IBM x255 Series Sun Fire V60x
Design Format	IEEE 1364-2001 Verilog IEEE 1076-1993 VHDL
Mixed HDL Logic Simulation	Event look-ahead Native code compiled Single kernel
Acceleration and Emulation	4- or 8-board system Up to 2.5 M gate capacity Up to 1552 I/Os Up to 500 K cycles per second Up to 67 Mbits RCC onboard memory Up to 1 GB dedicated external memory Up to 4 GB workstation memory
Debugging	Support for mixed HDL Graphical user interface Real-time logic simulation hot swapping between software and hardware VCD-on-Demand (VoD)
HW/ SW Co-Verification	Software models of ARM CPU cores Support for all ARM7 and ARM9, and ARM11 cores Support for ARM software debuggers, armsd, ADU, and RealView® Debugger (RVD)
In-Circuit Emulation (ICE) using ARM Core Modules and Logic Tiles	Support for all ARM Core Modules Support for ARM926EJ-S, ARM946E-S, ARM1136J-S, and ARM1136JF-S using ARM Logic Tiles Support for any software debugging tool supported by the ARM Core Module’s Multi-ICE connector
AMBA Testbench Development	Transaction-level API and synthesizable model interface for high performance testbench development Support for AMBA bus protocols

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