eCelerator Testbench Acceleration

eCelerator Benefits Synthesizes portions of e testbenches onto hardware platforms Dramatic performance gains vs. software simulation Full access to all Specman Elite features Buffered transaction-based interface Single testbench drives software and accelerated testbenches Comprehensive acceleration/emulation vendor support More detailed information

Today’s verification challenges require powerful testbenches and high-performance simulation solutions. eCelerator ™ synthesizes e testbenches to enable Specman Elite’s powerful methodology to run on multiple hardware accelerators and emulators.

As today’s ICs and systems grow in complexity, you face a growing challenge in the realm of verification. Customers require powerful methodologies and high performance.

Verisity’s Specman Elite® offers a comprehensive environment for all aspects of verification: automatic generation of functional tests, data and assertion checking and functional coverage analysis.

The use of acceleration/emulation hardware for the verification of complex ICs and systems has also been attractive because of its raw performance.

Verisity’s eCelerator addresses the need for power and performance by enabling acceleration of e testbenches while maintaining the power of Specman Elite.

eCelerator synthesizes the most expensive portions of e testbenches onto the box.

But My Testbenches Communicate with My DUT Every Cycle…
The portions of the e testbench that communicate with the DUT are exactly the portions that eCelerator synthesizes for use into “the box”. With it’s buffered transaction-based interface, you control on a test-by-test basis whether Specman Elite generates and sends 1, 10, or 10000 transactions to your DUT. This lets you reap the significant performance benefits of a testbench acceleration methodology.

Verisity’s Solution
eCelerator uses innovative synthesis technology to transform the most frequently executed portions of your e testbenches for acceleration via hardware. By shifting the computationally most expensive parts onto hardware, you can achieve significant performance gains in your verification— from 10-to 50x or more. Regression runs which can take weeks to complete can now be finished in hours. And since part of your testbench remains on the workstation, all the features of Specman Elite are accessible.

Powerful Testbench Acceleration Methodology
In the past, the only way you could get an HDL testbench to run with verification hardware was to attempt writing the testbench in synthesizable HDL— nearly impossible. More often than not, a separate, less powerful testbench was created for this purpose.

With testbench acceleration, you can still create your e testbench quickly to generate tests for the design, perform complex data and protocol checking and collect functional coverage. By partitioning the testbench and specifying the granularity of transactions to the design, you can trade higher performance on a test-by-test basis for sharper visibility into the impact of each generated test on the design.

You can still do on-the-fly generation to uncover difficult corner-case bugs quickly. Verisity’s testbench acceleration methodology not only gets you dramatically improved performance and enables much more modular testbench environments, but you sacrifice none of Specman Elite’s powerful verification capabilities.

e Synthesis with eCelerator
eCelerator accepts a significant subset of the e verification language, allowing you to synthesize all of your BFMs, protocol checkers, monitors, coverage collection, error mechanisms and more. This enables a natural partitioning of testbenches to maximize performance.

Buffered Transaction-based Interface
Current co-simulation interfaces are typically either event- or cycle-based, forcing numerous interruptions to the acceleration hardware and limiting performance. Verisity has worked with its acceleration/emulation vendor partners to create a new buffered transaction-based scheme. The ability to buffer many transactions to the design enables much higher communication bandwidth and removes the need for Specman Elite to communicate on a cycle-by-cycle basis with the hardware. In addition, the interface provides visibility to the synthesized testbench and DUT, enabling full visibility to the entire testbench.

Simulation Consistency
The same testbench is used for both pure software and accelerated testbench simulations, with 100% consistency. This gives you the ability to use acceleration/emulation earlier in the verification cycle, providing better utilization of hardware resources and increasing verification throughput.

Comprehensive Vendor Support
eCelerator supports the most popular hardware acceleration and emulation systems. For more information, contact your local Verisity sales representative or see us on the web at www.verisity.com.

Testbench Acceleration Flow with eCelerator.

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